The High Density Interconnected (HDI) printed circuit boards can be realized using the Sequential Build Up (SBU) technology. This multilayer technology allows to sequentially add further pairs of layers to a multilayer core, or inner. A dielectric element and a copper foil are put both on top and bottom of the inner (like in the masslam manufacturing process) and then the resulting structure is submitted to the drilling, plating and etching processes.
Next finishes and solder mask can be applied to the multilayer printed circuit board or a new pair of layers can be added to the structure repeating the steps described above.
Nowadays 4 is considered as the maximum number of layers pairs that can be reasonably added to a multilayer core of N layers.
SBU printed circuit boards are commonly labelled as 1+N+1, 2+N+2, etc, where N is the number of layers constituting the core and 1, 2, etc the number of added layers, i.e. the number of pressing cycles involved excluding the one requested for the realisation of the inner (2 pressing cycles for 1+N+1, etc).
The sequential build up is the only technology that makes possible to realise blind vias between two consecutive internal layers (the Sequential Lamination allows buried vias only at the interface between the subsets).
Based on product specifications and requirements, buried microvias can be stacked (fig 5) or staggered (fig 2). When stacked, the microvias require the vias to be filled with copper (copper filling or copper via filling technology) to properly realise the connection between layers. When staggered, the microvias are a little bit shifted with respect to the vertical axis and the connection is realised through standard plating.
The staggered microvias solution, that is cheaper than the copper filling but requires a extreme precision in manufacturing, can be adopted only when some tolerance (few microns) is allowed in the horizontal dimesion of the pcb.
An alternative approach to the staggered microvias is the capped vias technology, that allows the realisation of the so called via in pad (ViP). The buried microvias are filled with resin and then plated. This solution allows a complanarity that is impossible to be achived by the stacked microvias because of the dimple that typically characterises copper filling.
|Numer of Layers||Max||36|
|PCB Thickness||Max||4,2 mm|
|Inner Layer Thickness||Min||50 μm|
|Track||Outer Layer||25 μm|
|Inner Layer||25 μm|
|Insulation||Outer Layer||25 μm|
|Inner Layer||25 μm|
|Max panel size||Rigid||640 x 540 mm|
|Solder Gap||38 μm|
|Laser via pads||External||200 μm|
|Mechanical via pads||External||300 μm|
|Vias diameter||Laser||75 μm|
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